imec - Neuromorphic Event-based Restricted Boltzmann Machines in FPGA

At imec, systems4IoT

The project main goal is to develop a digital implementation in FPGA of a Spiking Restricted Boltzmann Machine (SRBM) and apply this architecture in real-life inference and classification tasks using imec-nl state-of-the-art sensors.

 

Project Description

Scientific Relevance:

Restricted Boltzmann Machines (RBMs) represent fundamental elements in Deep Belief

Networks (DBNs). These type of architectures set the current state-of-the-art performance in a variety of task including speech analysis, image classification and motor control. The implementations of RBMs and DBNs in neuromorphic hardware can result beneficial for a variety of reasons which include:

 

1) concurrency in processing - memory and computation are co-localized

2) event-based processing - only process information when needed

3) low power consumption

4) low-latency

5) compatibility with embedded systems

 

In this project will focus on the synthesis of spiking Restricted Boltzmann Machines (SRBM) which will be analyzed as Synaptic Sampling Machines and Generative Models [1]. Inference and learning in RBMs and DBNs is achieved via Markov Chain Monte Carlo

procedure called Gibbs sampling. It has already been shown that this procedure can be

implemented using spiking neurons under certain circumstances [2]. This project will explore relations among neuromorphic Restricted Boltzmann Machines and current state-of-the-art deep learning mechanisms as DropConnect and Dropouts. During

the course of the project, we will explore bio realistic learning rules as Spike Timing

Dependent Plasticity (STDP) and event-driven Contrastive Divergence (eCD) as the main mechanism for weight update.

 

The project main goal is to develop a digital implementation in FPGA of a Spiking

Restricted Boltzmann Machine (SRBM) and apply this architecture in real-life

inference and classification tasks using imec-nl state-of-the-art bio-sensors.

 

Project workflow:

The project duration is 9 months total. Task duration is noted on a monthly basis for each task. (es.M3 stands for 3rd month from the start of the project)

 

The project will benefit from an already existing software simulation that is used to train

Spiking Restricted Boltzmann Machines and that will be used as a starting point.

 

References:

1- S. Das et al ., " Gibbs sampling with low-power spiking digital neurons ," 2015 IEEE International Symposium on Circuits and Systems (ISCAS) , Lisbon, 2015, pp. 2704-2707.

2- O'Connor Peter, Neil Daniel, Liu Shih-Chii, Delbruck Tobi, Pfeiffer Michael “ Real-time classification and sensor fusion with a spiking deep belief network “ ,Frontiers in Neuroscience, 7, 2013

3- E. Neftci, S. Das, B. Pedroni, K. Kreutz-Delgado, G. Cauwenberghs, “ Restricted boltzmann machines and continuous-time contrastive divergence in spiking neuromorphic systems” , May 2013.

4- E. Neftci, S. Das, B. Pedroni, K. Kreutz-Delgado, G. Cauwenberghs “ Event-driven contrastive divergence for spiking neuromorphic systems ” Frontiers in Neuroscience, 7,2014

5- A. Courville, G. Desjardins, J. Bergstra and Y. Bengio, " The Spike-and-Slab RBM and Extensions to Discrete and Sparse Data Distributions ," in IEEE Transactions on Pattern Analysis and Machine Intelligence , vol. 36, no. 9, pp. 1874-1887, Sept. 2014.

6- B. U. Pedroni, S. Das, E. Neftci, K. Kreutz-Delgado and G. Cauwenberghs, "Neuromorphic adaptations of restricted Boltzmann machines and deep belief networks ," The 2013 International Joint Conference on Neural Networks (IJCNN) , Dallas, TX, 2013, pp. 1-6.

7- S. Sheik et al ., " Synaptic sampling in hardware spiking neural networks ," 2016 IEEE International Symposium on Circuits and Systems (ISCAS) , Montreal, QC, 2016, pp. 2090-2093.

 

 

Your Tasks

a) (M1) Run, understand the already available simulation. The student should be able to

modify the SRBM architecture and its leaning algorithm.

b) (M2,M3) The second task is to determine tradeoffs of layers / parameters / bit-precision of the SRBM that can be tuned while maintaining classification accuracy. Explore online learning rules as STDP and eCD [3,4,5].

c) (M4-M7) Set up an event-based VHDL architecture for the SRBM, this architecture will include the following macro-blocks.

1) Address Event Representation block. This block will take care of communication of input and output spikes.

2) Neurons Core Layer, which will include neurons current state and neuron state

update logic.

3) Synaptic weight memory block

4) STDP/eCD Learning block (optional)

d) (M8-M9) The final task is to determine the computational cost of the SRBM in bio-signal classification tasks to conclude whether the event-based processing pays off. The

architecture will be characterized in terms of latency and power per synaptic events. Explore the latency vs accuracy trade-off. Compare the results with state-of-the-art systems (GPU/CPU based).

 

Your Profile

  • Electrical Engineer / Computer Science.
  • Programming skills: one of Matlab/Python/C++/VHDL.
  • Proven knowledge of VHDL and FPGA, ability to work independently with digital logic design.
  • Basic understanding of neural networks, machine learning.
  • Good mathematical skills.

 

For all inquiries, please contact:

Ms Najat Loiazizi, HR specialist.

Telephone number: +31 (0)40 40 20 675

 

Apply now

 

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