Design of critical blocks on an FPGA for phase and amplitude domain ranging and localization

At imec, Radio Systems

Holst Centre / Imec-NL are investigating algorithms for precise ranging and localization of wireless devices. One of the core blocks is a singular value decomposition on complex-value matrices, with 3rd order computational complexity, and 2nd order memory size upper bounds.  The project aims for an FPGA implementation of the critical blocks.

 

Project Description

Positioning and navigation technologies are interesting for many use cases. For outdoor ositioning, we have GPS – the Global Positioning System. It provides us with accurate positioning and navigation, and every smart device has built-in GPS integration. However, for indoor positioning, the playfield is not that clearly defined. A promising technique is a hybrid signal strength and phase accumulation algorithm, that could end up with sub-meter positioning accuracy.

 

Your Tasks

  • Literature survey on the current state of the art;
  • Develop/expand idea(s) and solution(s) to implement SVD on an FPGA;
  • Develop/expand idea(s) and solution(s) to implement other critical blocks on an FPGA;
  • Implement and validate the idea's/solution(s) in an FPGA design tool;
  • Testing and analyzing the performance using a measurement set-up (at Holst Centre);
  • (Option) submit the work to a top-ranking publication;
  • Expected project duration is about 9 to 12 months.

 

Your Profile

  • Solid mathematical background is a must;
  • Interest in FPGA Platforms is a must;
  • Experience with signal processing is preferable;
  • Motivated student eager to work independently and expand knowledge in the field;
  • Good written and verbal English skills.

 

For all inquiries, please contact:

Ms Najat Loiazizi, HR specialist.

Telephone number: +31 (0)40 40 20 675

 

Apply now

 

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